dc.contributor.author | PATEL, ATISH J. | |
dc.date.accessioned | 2020-11-06T09:36:41Z | |
dc.date.available | 2020-11-06T09:36:41Z | |
dc.date.issued | 2016-10-01 | |
dc.identifier.uri | http://ir.paruluniversity.ac.in:8080/xmlui/handle/123456789/7237 | |
dc.description | For Full Thesis Kindly Contact to Respective Library | en_US |
dc.description.abstract | In this project, a protection scheme for HVDC converters (classical VSCs as well as MMCs) against dc-side faults is contemplated. The contemplated scheme provides complete segregation between the ac side and the HVDC converters during dc faults which allow the dc-link current to freely decay to zero (the grid current contribution into the dc fault is eliminated). This posses combining and connecting the double thyristor switches a cross the ac output terminals of the HVDC converter. The contemplated protection scheme provides advantages, such as lower dv/dt stresses and lower voltage rating of thyristor switches in accumulation to providing full segregation between the converter semiconductor devices and ac grid during dc-side faults. A simulation case study has been carried out to reveals the effectiveness of the contemplated scheme. | en_US |
dc.language.iso | en | en_US |
dc.publisher | Parul University | en_US |
dc.subject | 140370707013 | en_US |
dc.title | Comparative analysis of Protection scheme for HVDC converter against DC side fault | en_US |
dc.title.alternative | 140370707013 | en_US |
dc.type | Thesis | en_US |