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Amba based ahb2apb bridge rtl design in verilog and verification in system verilog

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dc.contributor.author Panchal, Bhagvati
dc.date.accessioned 2020-11-05T11:06:40Z
dc.date.available 2020-11-05T11:06:40Z
dc.date.issued 2020-04-01
dc.identifier.uri http://ir.paruluniversity.ac.in:8080/xmlui/handle/123456789/7165
dc.description For Full Thesis Kindly contact to respective Library en_US
dc.description.abstract The Advanced Microcontroller Bus Architecture (AMBA) is an open System-on-Chip bus protocol for high performance buses to communicate with low-power devices. The AMBA AHB is for high-performance, high clock frequency system modules. In the AMBA Advanced High Performance bus (AHB) is used to connect a processor, a DSP, and high-performance memory controllers. The AMBA APB is optimized for low power consumption and interface reduced complexity to support peripheral functions. It also contains a Bridge, which connects the AHB and APB buses. Bridges are standard bus-to-bus interfaces that allow IPs connected to different buses to communicate with each other in a standardized way. So AHB2APB bridge is designed, implemented using VERILOG tool and tested using Verilog testbench by simulating it in XILINX ISE. Also, we verify the all functions and specification of Bridge protocol by writing verification code using Universal Verification Methodology(UVM). The code coverage and functional coverage and functional verification of the Bridge RTL design will get 100 percent covered by QUESTASIM. en_US
dc.language.iso en en_US
dc.publisher Parul University en_US
dc.subject 180305212003 en_US
dc.title Amba based ahb2apb bridge rtl design in verilog and verification in system verilog en_US
dc.title.alternative 180305212003 en_US
dc.type Thesis en_US


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