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<title>2020</title>
<link href="http://localhost:8080/xmlui/handle/123456789/7162" rel="alternate"/>
<subtitle/>
<id>http://localhost:8080/xmlui/handle/123456789/7162</id>
<updated>2026-04-12T03:43:36Z</updated>
<dc:date>2026-04-12T03:43:36Z</dc:date>
<entry>
<title>Enhancement of night time video using dark channel prior ip accelerator</title>
<link href="http://localhost:8080/xmlui/handle/123456789/7166" rel="alternate"/>
<author>
<name>Nambinina, Rakotojaona</name>
</author>
<id>http://localhost:8080/xmlui/handle/123456789/7166</id>
<updated>2020-11-07T06:35:13Z</updated>
<published>2020-04-01T00:00:00Z</published>
<summary type="text">Enhancement of night time video using dark channel prior ip accelerator
Nambinina, Rakotojaona
Enhancement of night-time video using Dark Channel Prior IP accelerator is proposed in this&#13;
thesis. Nighttime video processing is difficult due to low brightness, low contrast and high&#13;
noise in the video. The above problems may affect the accuracy and may results in failures of&#13;
object detection or object classification at night time. Dark Channel Prior (DCP) filter is used&#13;
to improve the visibility, brightness, and contrast of the night-time input video. Processing&#13;
speed is a challenging task on the real-time application of the DCP algorithm for night time&#13;
video enhancement. Hence, the DCP algorithm is implemented on FPGA (ALVEO Board) to&#13;
increase the speed of video processing. In order to demonstrate the quality of the proposed&#13;
method, a practical environment with a Vitis software tool and Alveo board was also set up to&#13;
evaluate the performance of hardware. Such extensive experimental results indicate that the&#13;
proposed algorithm and hardware structure are effective, feasible and straightforward to&#13;
apply to practice.
For Full Thesis Kindly contact to respective Library
</summary>
<dc:date>2020-04-01T00:00:00Z</dc:date>
</entry>
<entry>
<title>Amba based ahb2apb bridge rtl design in verilog and verification in system verilog</title>
<link href="http://localhost:8080/xmlui/handle/123456789/7165" rel="alternate"/>
<author>
<name>Panchal, Bhagvati</name>
</author>
<id>http://localhost:8080/xmlui/handle/123456789/7165</id>
<updated>2020-11-07T06:35:51Z</updated>
<published>2020-04-01T00:00:00Z</published>
<summary type="text">Amba based ahb2apb bridge rtl design in verilog and verification in system verilog
Panchal, Bhagvati
The Advanced Microcontroller Bus Architecture (AMBA) is an open System-on-Chip bus protocol for high performance buses to communicate with low-power devices. The AMBA AHB is for high-performance, high clock frequency system modules. In the AMBA Advanced High Performance bus (AHB) is used to connect a processor, a DSP, and high-performance memory controllers. The AMBA APB is optimized for low power consumption and interface reduced complexity to support peripheral functions. It also contains a Bridge, which connects the AHB and APB buses. Bridges are standard bus-to-bus interfaces that allow IPs connected to different buses to communicate with each other in a standardized way. So AHB2APB bridge is designed, implemented using VERILOG tool and tested using Verilog testbench by simulating it in XILINX ISE. Also, we verify the all functions and specification of Bridge protocol by writing verification code using Universal Verification Methodology(UVM). The code coverage and functional coverage and functional verification of the Bridge RTL design will get 100 percent covered by QUESTASIM.
For Full Thesis Kindly contact to respective Library
</summary>
<dc:date>2020-04-01T00:00:00Z</dc:date>
</entry>
<entry>
<title>Matlab simulation and hdl implementation of dvb-s2 modulator</title>
<link href="http://localhost:8080/xmlui/handle/123456789/7164" rel="alternate"/>
<author>
<name>Brahmbhatt, Dhwani</name>
</author>
<id>http://localhost:8080/xmlui/handle/123456789/7164</id>
<updated>2020-11-07T06:36:26Z</updated>
<published>2020-05-01T00:00:00Z</published>
<summary type="text">Matlab simulation and hdl implementation of dvb-s2 modulator
Brahmbhatt, Dhwani
Ongoing improvements in the region of satellite communication are making&#13;
conceivable minimal effort information transmission and TV broadcasting to gently&#13;
populated zones spread over a huge environmental district. As a result of direct and&#13;
non-direct manner of satellite subsystems and station, audio and video&#13;
transmissions through satellite transponders face corruption. These damages make&#13;
an antagonistic impact on the end to end interface execution. This Project is&#13;
centered on reproduction of the Digital Video Broadcasting – Satellite second era&#13;
computerized TV transmission. MATLAB is produced an application for DVB-S2&#13;
simulation. It tends to be utilized for re-enactment of entire preparation in DVB-S2&#13;
transmitter including stream adjustment, FEC coding with interleaving, modulation,&#13;
channel damage &amp; also opposite tasks in the receiver. The main aim of this model&#13;
is to manage Digital Video Broadcasting – Satellite second era parameters using&#13;
filter in different modulation scheme like QPSK, 8PSK, 16APSK and 32APSK, to&#13;
get better roll off factor, with all the possible code rates, Hardware Description&#13;
Language is used to prepare DVB-S2 model, using this technic will implement cost&#13;
efficient model and also enables the user for the customized code rates.
For Full Thesis Kindly contact to respective Library
</summary>
<dc:date>2020-05-01T00:00:00Z</dc:date>
</entry>
<entry>
<title>Implementation of iot based monitoring and controlling solar system</title>
<link href="http://localhost:8080/xmlui/handle/123456789/7163" rel="alternate"/>
<author>
<name>Bhatiya, Vinayak</name>
</author>
<id>http://localhost:8080/xmlui/handle/123456789/7163</id>
<updated>2020-11-07T06:37:05Z</updated>
<published>2020-04-01T00:00:00Z</published>
<summary type="text">Implementation of iot based monitoring and controlling solar system
Bhatiya, Vinayak
The The Internet of Things now a day one of the most popular being research topic so, based on our system sensing, controlling or monitoring wirelessly to the available on the network. With help of IoT creating connectivity computer operated system. Our system uses the Message Queuing Telemetry Transport protocol. This network working based on publishes and subscribe method. These publish and subscribe in between available broker. Broker is a work as server in this network method. In our system display online uses of power, voltage, current, temperature, weather condition, tracking sun light and dust cleaning with help of wipers. All this monitoring and controlling is done through ATmega328 controller, ModBus to TTL convertor, ESP8266, etc. in this system monitor the analysis of the daily bases of data &amp; control solar wipers and sunlight toward movement of solar panel.
For Full Thesis Kindly contact to respective Library
</summary>
<dc:date>2020-04-01T00:00:00Z</dc:date>
</entry>
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